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Low Power Architect Engineer - All Level

Company: Qualcomm
Location: San Jose
Posted on: August 6, 2022

Job Description:

The candidate will be responsible to define SOC Low Power architecture and drive the micro architecture, design, development, verification and implementation. Also needs to lead and coordinate with various IP/subsystem and SoC teams to drive the low power architecture of the entire chip.Responsibilities also include defining the power budget/spec for IPs, subsystems and SoC, and coming up with new architecture initiatives, rolling up of the power numbers and maintain the chip power dash board for various applications.The candidate is also responsible for the silicon power measurements, Si debug and power correlation. Also own the bring up and validation of the Low power use case scenarios at system level.Thorough knowledge of SOC low power architecture, low power design methodology, and experience in power estimates, power analysis tools, power reduction techniques and Power Intent/Implementation is a must.
Minimum Qualifications:The ideal candidate for senior level would be:
- 10+ yrs. of working experience in ASIC Design- 5 years of experience with low power architecture, micro-architecture, Design, Power Intent/implementation, power optimization and power estimation- Experience in silicon bring up and debug is a must.- Experience in leading the low power architecture from project start to volume chip production for atleast one product cycle.- Required experience on SoC architecture, multi-domain clocking, PCIE or USB peripherals, AMBA bus protocols such as AHB, APB and AXI- Experience in CPU sub system based design is preferred.

Keywords: Qualcomm, San Jose , Low Power Architect Engineer - All Level, Professions , San Jose, California

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