SanJoseCARecruiter Since 2001
the smart solution for San Jose jobs

IC PACKAGING SOLUTIONS ARCHITECT

Company: Advanced Micro Devices
Location: San Jose
Posted on: November 23, 2022

Job Description:

WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team.
AMD together we advance_ IC PACKAGING SOLUTIONS ARCHITECT
THE ROLE:
Oversee package SI/PI and PND topology assessment for advanced package architecture in AMD AECG package design and development team. Package SI/PI architect responsible to demonstrate package electrical performance from design with HVM and forward looking technology. The role will participate in advanced FPGA package design and development, incorporating silicon/TSV, package stack-up/routing/PDN and discrete decoupling capacitors evaluation. Utilize techniques in circuit model generation, simulation, and validation and EM (Electromagnetic) for correlating hardware measurements versus pre/post-layout simulation, effecting signal integrity-driven design flow for advanced FPGA product development. Optimize system-level performance in power integrity, high-speed IO/SSO, and multi-tens gigabit transceivers. Drive cost reduction through the adoption of leading-edge package technology while achieving performance-driven objectives..
THE PERSON:
The ideal candidate will be part of package integration team to work with the package layout and electrical team to assess product package definition, performance and cost tradeoff, technology design rule development and package structure planning. Have the desire to lead a project, be a team player and contribute individually.
KEY RESPONSIBILITIES:


  • Package SI/PI architect responsible to demonstrate package electrical performance from design with HVM and forward looking technology
  • Participate in advanced FPGA package design and development, incorporating silicon/TSV, package stack-up/routing/PDN and discrete decoupling capacitors evaluation
  • Utilize techniques in circuit model generation, simulation, and validation and EM (Electromagnetic) for correlating hardware measurements versus pre/post-layout simulation, effecting signal integrity-driven design flow for advanced FPGA product development
  • Optimize system-level performance in power integrity, high-speed IO/SSO, and multi-tens gigabit transceivers
  • Drive cost reduction through the adoption of leading-edge package technology while achieving performance-driven objectives

    PREFERRED EXPERIENCE:

    • Solid background in fundamentals of SI, PI, transmission-line theory, and circuit design
    • Familiar with Cadence PowerDC, PowerSI, Ansys HFSS, Keysight ADS, Siemens Hyperlynx, Cadence Allegro, Ansys Q3D, Synopsys Hspice
    • Possesses an understanding of high-speed serdes, memory interface, supply voltage noise, and packaging technologies/trends to drive package design validation throughout all phases of the product cycle
    • Understand in-depth package development flow and work fluently with NPI program management and manufacturing/process team to synthesize a cohesive package introduction plan
    • Interface and negotiate effectively across engineering teams to balance performance adequacy and schedule commitment
    • Drive package design review, manage modeling/simulation projects, prepare and present the final design review (FDR) to all product partners
    • Collaborate with silicon IP, silicon evaluation, and package technology teams to establish the development plan and timeline for the R&D project, test vehicle, and prototype packages
    • Industry experience in IC package technology and product development in the semiconductor industry with consistent track record
    • Project/program execution and management experience in the IC package development field
    • Demonstrate technical leadership in complex product development under challenging technical and schedule conditions

      ACADEMIC CREDENTIALS:
      BS with or MS with Electrical Engineering or Computer Engineering
      LOCATION:
      San Jose, CA
      #LI-DW1 Benefits offered are described: .
      AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.

Keywords: Advanced Micro Devices, San Jose , IC PACKAGING SOLUTIONS ARCHITECT, Other , San Jose, California

Click here to apply!

Didn't find what you're looking for? Search again!

I'm looking for
in category
within


Log In or Create An Account

Get the latest California jobs by following @recnetCA on Twitter!

San Jose RSS job feeds