Location: San Jose
Posted on: June 26, 2022
Job Location: - - - - - - - - - - - - -San Jose,
CaliforniaHiring Manager: - - - - - - - - -Director, Memory Design
- Hands-on design of SRAM memory circuits & compiler timing/power
characterization, netlist/layout tiling, IR/EM flow. -
- Supervision of layout, compiler coding. -Supervision and
interpretation of testing results. -
- SRAM Compiler verification/QC. -
- The individual would primarily be a technical contributor, be
part of a design R&D team and frequent interaction with
Headquarters in Hsinchu, Taiwan.
- Individual contributor, need to be hands-on for all the
compiler related work, not limited to circuit design
- Education: BS or Master's degree in semiconductor related
- SRAM compiler experience preferred.
- Experienced in Cadence & Synopsys circuit design environment
- Experienced in advanced technology circuit design & layout
- Must have good team work attitude and be able to work under
- This is an environment with majority of senior design
experience people.TSMC Technology Inc. is an Equal Opportunity
Keywords: TSMC, San Jose , SRAM Designer, Other , San Jose, California
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