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Sr. Layout Engineer

Company: Monolithic Power Systems
Location: San Jose
Posted on: May 3, 2021

Job Description:

Sr. Layout EngineerAs a senior analog layout engineer, you will be responsible to design layout for analog and mixed signal circuits in various CMOS/Bi-CMOS Technologies. Participate in the analog/mixed-signal layout design flow including layout floor-planning, design, verification (DRC, ERC, LVS and etc.), and parasitic R/C extraction. Will also work on pad-frame, ESD, I/O, and full chip level layout integration and verifications.Requirements:At least 5 years of experience in analog and mixed-signal integrated circuit layout in CMOS/Bi-CMOS processExperienced with layout techniques of high-precision component matching, low noise, and high-speed low-parasitic routingProficiency in custom and standard cell based floor-planning and hierarchical layout methodologySolid understanding on parasitic R/C, coupling, RC delay, IR drop, EM, latch-up and etc.Proficiency in Cadence layout tools and flow, and good debugging skills for DRC/LVS error reportScripting skills in PERL or SKILL are a plusPrior layout design experience in ADC: SAR/Delta-Sigma/Pipelined/Flash is a plusPrior layout design experience in Low-Noise Amplifier/Op-amp/RF/Precision Reference is a plusPrior experience in chip-level integration including analog and digital system, third party IPs (e.g., SRAM, MCU and etc.), pad/IO/ESD is a plusSolid written & verbal communication abilitiesSelf-motivated, willing to learn new technologies, & capable of working effectively with analog and digital designersMinimum Bachelor Degree or Equivalent in Electrical Engineering or relatedLocation: San Jose, California, USSDL2017

Keywords: Monolithic Power Systems, San Jose , Sr. Layout Engineer, Other , San Jose, California

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