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System Validation Engineer Lead

Company: Intel GmbH
Location: San Jose
Posted on: February 23, 2021

Job Description:

  • --- System Validation Engineer Lead San Jose, CA Job ID: JR0157975 Job Category: Engineering Primary Location: San Jose, CA US Other Locations: Job Type: Experienced Hire System Validation Engineer LeadJob Description
    Intel Programmable Solutions Group (PSG) is entering an exciting new phase with transformative market penetration in data center, 5G wireless, and industrial market. As result of this there are exciting opportunities in developing and validating structured ASIC product with cutting edge technology and superior performance per watt at low cost.We are looking for a Senior System Validation Engineer to join our growing team. As a system validation lead you will define validation requirement and design test logic required to achieve validation coverage. You will also work with team members to drive execution toward tape-in quality power-on readiness and post-silicon validation. This leadership role will provide ample opportunities for broad technical influence across organizations making huge impact on the business bottom line and hence personal growth.The scope of the role will include, but not limited to:
    • Conduct technical readiness for a new structured ASIC product and define high level validation strategy
    • Define validation requirement , access mechanism board requirement and test logic required to achieve validation coverage
    • Represent validation team in cross functional meetings by presenting updates , attending to actions assessing impact , and bridging communication gaps with the team
    • May involve validation plan document writeup , test content development , test content pre-silicon emulation test content , post silicon bring-up , bench related debug and data sheet spec writeup and review
    • May involve customer pre-silicon enablement , customer power-on and post silicon issue debug
      Qualifications

      You must possess the minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidatesMinimum Qualifications- Bachelor's degree in Electrical Engineering, Computer Engineering, or related field- 7+ years of industry experience including the following areas:
      • Post-silicon electrical and functional validation experience
      • Experience in electrical characterization of highspeed IOs (e.g. Serdes Transceiver)
      • Experience in protocol validation (e.g. PCIE, Ethernet, CPRI, CEI, JESDI, Xaui,)
      • Experience with validation instrument automation and Python scripting Preferred Qualifications
        • 10+ years of industry experience in a post-silicon electrical validation role
        • RTL Design for Test Logic experienceInside this Business Group
          The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.

          Posting Statement

          All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Keywords: Intel GmbH, San Jose , System Validation Engineer Lead, Other , San Jose, California

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