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PCELL EDA Contractor (REMOTE)

Company: Technical Link
Location: San Jose
Posted on: March 28, 2020

Job Description:

Manager would like to see candidates that have demonstrated pcell developmentautomation in their past work history. Background Be part of a dynamic and skilled Research team developing test structure design enablement for the world's most advanced semiconductor technologies. Develop manual layout per specified requirements, using industry standard (EDA) tools including the Cadence Virtuoso Design Environment. Ensure that designed layouts pass Design Rule Checks (DRC). Specified layouts will be primarily test structures rather than working circuitry. Close and frequent cooperation with development engineers will be required. Job Duties Job Duty 1 - Develop manual layout cells per specified requirements, using industry standard (EDA) tools including the Cadence Virtuoso Design Environment. Job Duty 2 - Interpret Design Rules and Macro Specifications. Work closely with process development engineers, test structure designers, and layout technicians to create layout automation that meets the intent of the test structure designers. Job Duty 3 - Create manual layout per specified requirements, using industry standard (EDA) tools including the Cadence Virtuoso Design Environment. Job Duty 4 - Debug and solve problems in a team environment. Basic Skills, clearances and other elements required, in order of importance, and number of yearsrsquo experience, where applicable, in each skill 1) Strong experience using the Cadence Virtuoso layout design tool, at least 3 years. 2) Experience with Cadence Skill programming language, at least 2 years. 3) Basic understanding of physical layout, technology ground rules, and semiconductor processing. 4) Ability to debug errors and solve problems. 5) Ability to work in a team environment. 6) Fluent English (both verbal and written) and strong communication skills. 7) Other Preferred location is Albany, NY. Alternate locations are Hopewell Junction, NY Essex Junction, VT or remote location (from your house preferred) Other Skills Desired, Years in each skill, where applicable 1) Preferred Experience with advanced sub-micron semiconductor technology nodes. 2) Preferred Experienced user of Synopsys ICV DRC checking tool.

Keywords: Technical Link, San Jose , PCELL EDA Contractor (REMOTE), IT / Software / Systems , San Jose, California

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