ASIC Verification Engineer

Company: Cisco Systems, Inc.
Location: San Jose
Posted on: April 22, 2024

Job Description:

Who We Are The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. With -2,100 employees across 16 countries, we design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco's ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry. Who You'll Work With
You will be in the Silicon One development organization as an ASIC design verification engineer in San Jose, CA. You collaborate closely with verification engineers, designers, hardware and cross functional teams to verify the ASIC in simulation, in emulation and during ASIC bring up. What You'll Do

• Maintaining existing DV environments and enhancing them
• Construct testbench including scoreboard, agents, sequencers, and monitors for new blocks
• Write test plan, develop testcases, debug regression failures and drive to module verification closure
• Ensuring complete verification coverage through implementation and review of code and functional coverage Who You Are
  • You are an ASIC Design Verification Engineer with 5+ years of related work experience with a Bachelor's or Master degree.
  • You will have an ASIC design verification background with hands-on experience in RTL verification and in-depth knowledge of SoC development cycle and the best industry practices, from specification through tape-out and lab validation, and a proven track record of success in high-performance/high-volume semiconductor markets. Minimum qualifications
    
    • Hands-on and deep understanding of System Verilog and UVM methodology
    • Experience in verifying complex blocks, clusters and top level for SoC
    • Can build testbenches from scratch, hands on experience with System Verilog constraints, structures and classes.
    • Ability to debug issues independently
    • Proficient in functional coverage and constrained random DV environments.
    • Scripting skills: Perl and/or Python scripting
    • Strong domain experience in one or more protocols in a plus - PCIe, CXL, Ethernet, AHB/AXI, DDR, MMU.
    • Experience with Veloce/HAPS is a plus
    • Formal verification (iev/vc formal) knowledge is a plusPreferred skils
      • Strong domain experience in one or more protocols in a plus - PCIe, CXL, Ethernet, AHB/AXI, DDR, MMU.
      • Experience with Veloce/HAPS is a plus
      • Formal verification (iev/vc formal) knowledge is a plus
      • Post silicon bring up and debug in lab skill is a plus
        Why Cisco? #WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you!Nearly every internet connection around the world touches Cisco. We're the Internet's optimists. Our technology makes sure the data traveling at light speed across connections does so securely, yet it's not what we make but what we make happen which marks us out. We're helping those who work in the health service to connect with patients and each other; schools, colleges, and universities to teach in even the most challenging of times. We're helping businesses of all shapes and sizes to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.We tackle whatever challenges come our way. We have each other's backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we're committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions. So, you have colorful hair? Don't care. Tattoos? Show off your ink. Like polka dots? That's cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us! #WeAreCisco

Keywords: Cisco Systems, Inc., San Jose , ASIC Verification Engineer, Engineering , San Jose, California