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Design Verification Engineer

Company: CHJ Recruiting
Location: San Jose
Posted on: March 19, 2023

Job Description:


You will be part of the ASIC Verification Team, creating and bringing to market the next generation products. You will have the following responsibilities:

  • Develop test strategies to verify next generation product
  • Develop and review block and chip level verification environments and test plans
  • Work closely with design engineers to develop test benches and test plans to meet coverage goals
  • Participate in selecting best in class 3rd party protocol verification IP
  • Help enhance the overall DV methodology by analyzing 3rd party verification tools
  • Debug failures in simulation and collaborate with designers in identifying root-cause issues
  • Develop a tests that will help achieve functional safety goals that meet ISO26262 compliance
  • Work with the systems and software teams on emulation platforms
  • Participate in the bring-up and debug of the device prototype
  • Provide support to the Product Engineering team to meet all validation and qualification goals for the product MINIMUM QUALIFICATIONS
    • 5 years of industry experience in design verification
    • Experience with test planning, test bench architecture and assertions
    • Constrained random verification experience with SystemVerilog using UVM
    • Coverage driven verification (code/functional/assertion coverage)
    • Strong programming skills in C/C++ and scripting experience with Python/Tcl/Perl
      As a team member, you have a passion to solve complex technical challenges and thrive to define ground breaking innovations. You are highly motivated, hands-on and tech savvy with excellent interpersonal skills.

Keywords: CHJ Recruiting, San Jose , Design Verification Engineer, Engineering , San Jose, California

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