Physical Design Engineer #4164 & #4251
Company: PEAK Technical Staffing USA
Location: San Jose
Posted on: January 25, 2023
Job Description:
Posted: 12/08/2022 Employment Type: Direct Placement Category:
Design Engineers Job Number: 95772 Job Description P-SC-001
PEAK is looking for a Physical Design Engineer in San Jose, CA or
Austin, TX. Open to recent MS/PHD grads as well.
RESPONSIBILITIES:
- Perform the following:
- Block level floorplan with the ability to analyze the quality
of the floorplan,
- Customized Clock tree structure,
- Place & Route,
- Implement ECOs for timing closure,
- Signal EM/Noise analysis and fix,
- Power IR/EM analysis and fix,
- DRC/LVS/ERC/ANTENNA analysis and clean up,
- Physical verification sign off.
- Additional duties assigned by the supervisor
- Customer on-site support.
REQUIREMENTS:
- Education:
- Bachelor/Master's degree in Electrical Engineering or Computer
Science.
- 2-10 years Netlist (or RTL)-GDS physical implementation
experience.
- In depth knowledge of major EDA tools/design flows.
- Experience with N28 or below technology.
- Experience in block level implementation or chip integration
and signoff.
- Experience in Perl/TCL language programming.
- Proven record in multi-million gate design production
tapeouts.
- Proven ability to analyze issues, solve problems and bring
closure
- Quality of execution and follow-through - able to execute tasks
assigned by the supervisor and customers and acquire the necessary
skills to execute assignments.
- Experience in any of the following is a plus:
- N16 and below technology.
- Low-power implementation methodology.
- Advanced timing signoff methodology.
- Able to independently complete Netlist-GDS P&R, signoff
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Keywords: PEAK Technical Staffing USA, San Jose , Physical Design Engineer #4164 & #4251, Engineering , San Jose, California
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