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Design Verification Engineer

Company: Zenex Partners
Location: San Jose
Posted on: August 7, 2022

Job Description:

Design Verification EngineerLocation:- San Jose, CAJob Type:- Full-time Permanent
About the Client:-The client is a leading global provider of product engineering and semiconductor design services. With over 500+ products developed and 40M deployments in 140 countries. The company's service offerings include digital transformation and connected IoT solutions, Including IoT Security, across various cloud platforms, including AWS and Azure.
Responsibilities of Design Verification Engineer

  • Writing and maintaining test plans
  • Creating and maintaining UVM test benches
  • Created a module testbench from scratch
  • Written Cover points, Assertions (SVA), and closed coverage.
    Requirements for Design Verification Engineer
    • BS/MS in EE/CE,
    • 5+ years of Design Verification experience
    • Familiarity with ASIC, Computer, and Embedded Systems Architectures
    • Knowledge of standard bus protocols such as AHB, AXI, etc.
      Good to have:-
      • Scripting and test automation for regression
      • Experience with PCIe/NVMe and/or ONFI
      • Experience with SSD architecture
        Perks & Benefits:-
        • Unlimited PTO
        • (Dental, Medical , Vision )
        • 401K with match
        • Other fulltime benefits

Keywords: Zenex Partners, San Jose , Design Verification Engineer, Engineering , San Jose, California

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