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Principal FPGA Prototyping DV Application Engineer

Company: Cadence Design Systems
Location: San Jose
Posted on: January 15, 2022

Job Description:

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.As an integral member of the North American Field Applications Engineering (AE) Team, you will work directly with industry leading semiconductor and system companies to deploy Cadence's market leading Palladium acceleration and emulation platform. In this customer facing role you will provide the front line technical support in the Pre and Post-Sales process and will work with the account team to come up with innovative solutions to address our customers most challenging problems. Key responsibilities in this position are to:Establish technical credibility and rapport with the customer and become the go-to expert for all of their technical inquiries and supportProvide in-depth technical assistance in collaboration with R&D to help support advanced acceleration/emulation flows to secure design winsChampion the customer needs and work with R&D and Marketing to develop competitive and creative technical solutions.Understand the competitive landscape and continuously work on differentiating Cadence's solutions.Write technical product literature such as application notes and technical articles.Review new product proposals and device specificationsThe major focus of this role will be on FPGA prototyping and will require strong skills in the following areas:Design fundamentals such as architecture, micro-architecture, HDLs and Synthesis and timingFundamental SoC Architecture knowledgeExperience with multiple clock domains and asynchronous interfacesStrong FPGA prototyping knowledge including compilation, debug and performance optimization on multiple FPGA prototyping platformsIn-depth knowledge of the FPGA development process & tool flow from RTL to bitstream for Xilinx or Altera productsHands on experience with lab bring up, debug, chipscope and instrument usageEmbedded software development and HW/SW codesign and coverificationKnowledge of SystemVerilog DPI highly desirable.Knowledge of UNIX, C/C++, scripting programming languages such as Perl, TCLStrong verbal and written communication skills in EnglishSelf motivated and strong teamwork skillsExperience in HW acceleration, In-Circuit Emulation is highly desirableMinimum Experience - - - - - - - - - - - - Minimum experience required: BSEE or MSEE with 5+ years of Industry experience-#LI-MA1We're doing work that matters. Help us solve what others can't.SummaryLocation: SAN JOSEType: Full time

Keywords: Cadence Design Systems, San Jose , Principal FPGA Prototyping DV Application Engineer, Engineering , San Jose, California

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