Signal Integrity Engineer Intern
Location: San Jose
Posted on: November 22, 2021
San Jose, CA, United States
Aug 5, 2021 At Xilinx, we are leading the industry transformation
to build an adaptable, intelligent world. ARE YOU bold,
collaborative, and creative? We develop leaders and innovators who
want to revolutionize the world of technology. We believe that by
embracing diverse ideas, pushing boundaries, and working together
as ONEXILINX, anything is possible.
Our culture of innovation began with the invention of the Field
Programmable Gate Array (FPGA), and with the 2018 introduction of
our Adaptive Compute Acceleration Platform (ACAP), has made a
quantum leap in capability, solidifying our role as the adaptable
platform supplier of choice. From the beginning, we have always
believed in providing inventors with products and platforms that
are infinitely adaptable. From self-driving cars, to world-record
genome processing, to AI and big data, to the world's first 5G
networks, we empower the world's builders and visionaries whose
ideas solve every day problems and improve people's lives.
If you are PASSIONATE, ADAPTABLE, and INNOVATIVE, Xilinx is the
right place for you! At Xilinx, we care deeply about creating
significant development experiences while building a strong sense
of belonging and connection. We champion an environment of
empowered learning, wellness, community engagement, and
recognition, so you can focus on work that matters - world class
technology that improves the way we live and work. We are
ONEXILINX. As a Signal Integrity Engineer Intern at Xilinx you will
be responsible for the following:
- Simulation analysis covering Signal/Power integrity analysis
- Support 3D modeling and Signal/Power Integrity modeling
- Support Signal Measurement in Lab
- Support Analysis support on Design and implementation of
routing guideline Education Requirements
- Currently, pursuing a--Master's or PhD degree in Electrical
Engineering or related field
- Depending on availability, the position is 20-40 hours per week
for 3-6 months, starting in Aug/Sept 2021
- Ideally, we are looking for a candidate located in the Bay Area
that would be able to work onsite occassionally. This is dependent
on Xilinx COVID Return to Office policies.
- Background on transmission line theory and in-depth knowledge
of electromagnetics, PCB layout and package layout techniques.
- Experience with SI simulation tools, e.g. Synopsis HSPICE,
Ansys HFSS, Q3D, Cadence PowerSI, PowerDC, and Agilent ADS.
- Knowledge of System Memory Bus is a plus, not a must
- Knowledge of Python is a plus, not a must. UNITED STATES:
Xilinx is an equal opportunity and affirmative action employer.
Applicants and employees are treated throughout the employment
process without regard to race, color, religion, national origin,
citizenship, age, sex, marital status, ancestry, physical or mental
disability, veteran status or sexual orientation. The information
requested here is used only in compliance with US Federal laws and
is not gathered for employment decisions. Responses are strictly
voluntary, and any information provided will remain confidential.
If you choose not to "self-identify", you will not be subject to
any adverse treatment.
CANADA and EUROPE: Xilinx is an equal opportunities employer.
SINGAPORE and AUSTRALIA: Xilinx is an equal opportunity and
affirmative action employer. Applicants and employees are treated
throughout the employment process without regard to age, race,
gender, religion, marital status and family responsibilities,
disability or sexual orientation.
CHINA, HONG KONG, KOREA, PHILIPPINES and TAIWAN: Xilinx is an equal
opportunity and affirmative action employer. Applicants and
employees are treated throughout the employment process without
regard to race, color, religion, national origin, citizenship, age,
sex, marital status, ancestry, physical or mental disability,
veteran status or sexual orientation.
Keywords: Xilinx, San Jose , Signal Integrity Engineer Intern, Engineering , San Jose, California
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