Senior Functional Safety Design Engineer
Company: Xilinx
Location: San Jose
Posted on: February 23, 2021
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Job Description:
Job DescriptionSenior Functional Safety Design Engineer159486San
Jose, CA, United StatesDec 14, 2020DescriptionJob DescriptionAt
Xilinx, we are leading the industry transformation to build an
adaptable, intelligent world. ARE YOU bold, collaborative, and
creative? We develop leaders and innovators who want to
revolutionize the world of technology. We believe that by embracing
diverse ideas, pushing boundaries, and working together as
ONEXILINX, anything is possible.Our culture of innovation began
with the invention of the Field Programmable Gate Array (FPGA), and
with the 2018 introduction of our Adaptive Compute Acceleration
Platform (ACAP), has made a quantum leap in capability, solidifying
our role as the adaptable platform supplier of choice. From the
beginning, we have always believed in providing inventors with
products and platforms that are infinitely adaptable. From
self-driving cars, to world-record genome processing, to AI and big
data, to the world's first 5G networks, we empower the world's
builders and visionaries whose ideas solve every day problems and
improve people's lives.If you are PASSIONATE, ADAPTABLE, and
INNOVATIVE, Xilinx is the right place for you! At Xilinx, we care
deeply about creating significant development experiences while
building a strong sense of belonging and connection. We champion an
environment of empowered learning, wellness, community engagement,
and recognition, so you can focus on work that matters - world
class technology that improves the way we live and work. We are
ONEXILINX.Job DescriptionXilinx has an opening for a Senior
Functional Safety Design Engineer in the Functional Safety
Technology Team. This team is responsible for designing
methodologies as well as executing Safety Analyses for standards
such as ISO26262 and IEC61508 for silicon products from Xilinx.In
This Highly Visible Role, You Will* Contribute to Functional Safety
Methodology by publishing common design guidelines for all design
teams * Provide microarchitectural, design and verification
guidance to design teams specific to their features * Guide design
teams through functional safety analysis (FMEA, DFMEA, FMEDA, DFA)
and review the output * Work with ASIC/SOC (Application-Specific
Integrated Circuit / System-on-Chip) engineers to identify safety
mechanisms to detect systematic faults and random faults * Work
with Firmware Engineers and Software Engineers to ensure software
safety mechanism can detect random faults * Work with production
and quality teams to derive safety level analysis * Support
marketing on presenting product quality to major customers during
product development and support customer development. * Support
Xilinx's Central Engineering team to build functional safety while
working with Tier-1 OEM and automotive manufacturing companies. *
Build Functional Safety specific IP (Microarchitecture, RTL, Design
Review, Verification) to standardize implementation of hardware
safety mechanisms * Contribute to project planning by performing
Scope/Schedule/Resources tradeoffs * Represent Xilinx in Standard
Committees * Augment Functional Safety Methodology by architecting
tools to aggregate all safety metrics of ISO-26262 and IEC-61508 to
support Safety Certification * Participate in build management
#mhJob Qualifications* Required Qualifications* MS 2+ years of
experience in Electrical Engineering, Computer Engineering or
related equivalent * Atleast 1 year of prior work experience in
safety analysis including DFA, FTA, FMEA and FMEDA that led to
certification * Familiar with Functional Safety Standards ISO 26262
or IEC 61508 on semiconductors * Experience in designing blocks for
SOC and integrating IP into SOC * Excellent verbal and written
communication skills * Understanding of ARM architecture and AMBA
Protocols such as APB, AXI, ACE, CHI * Working experience with
industry-standard EDA tools from Cadence, Synopsys or Mentor *
Excellent organizational skills, attention to detail and precision
* Experience executing in parallel projects with rigid schedules *
Developed automation using scripting techniques such as PERL,
Python or TCL * Simulation and verification experience at block and
chip level environment * Desired Qualifications* Development and
verification through fault injection of Software Test Libraries for
safety critical applications * MBIST, LBIST, Scan, Scan
Compression, ATPG and JTAG design * Working in design teams
distributed over multiple sites * Post-silicon validation and debug
experience * FPGA knowledge and emulation experience * Experience
with Xilinx ISE or Vivado Design Suite
Keywords: Xilinx, San Jose , Senior Functional Safety Design Engineer, Engineering , San Jose, California
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