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Hardware Engineer - Design Verification

Company: R Systems, Inc.
Location: San Jose
Posted on: October 16, 2020

Job Description:

Hardware Engineer - Design Verification 6 Months contract Location San Jose, California Responsibilities Work closely with the design team to review and understand specifications architectures micro-architectures Define test plans Develop block level and chip level verification environments Produce functional code coverage metrics Run regression and debug triage failures in simulation environment Validate features and work with software teams to debug issues in the lab Requirements BSEE with 5 years or MSEE with 3 years experience Advanced knowledge of standard ASICFPGA verification flows including simulation, testbench development, and post silicon validation Excellent knowledge of System Verilog and Verilog Experience in developing test benches using the OVM, VMM or UVM methodology Good knowledge with CC++ Experience with either Perl or Python scripts Knowledge of industry high speed interface standard protocols (PCI Express, DDR, NAND Flash etc.) strongly desired Experience in computer storage and networking is desired Should be a team player with excellent communication skills and the desire to take on diverse challenges

Keywords: R Systems, Inc., San Jose , Hardware Engineer - Design Verification, Engineering , San Jose, California

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